By Gregory Ruetsch
CUDA Fortran for Scientists and Engineers indicates how high-performance software builders can leverage the ability of GPUs utilizing Fortran, the well-known language of clinical computing and supercomputer functionality benchmarking. The authors presume no previous parallel computing event, and canopy the fundamentals in addition to top practices for effective GPU computing utilizing CUDA Fortran.
To assist you upload CUDA Fortran to current Fortran codes, the ebook explains find out how to comprehend the objective GPU structure, determine computationally in depth components of the code, and adjust the code to regulate the knowledge and parallelism and optimize functionality. All of this can be performed in Fortran, with no need to rewrite in one other language. each one suggestion is illustrated with genuine examples so that you can instantly overview the functionality of your code in comparison.
- Leverage the ability of GPU computing with PGI's CUDA Fortran compiler
- Gain insights from individuals of the CUDA Fortran language improvement team
- Includes multi-GPU programming in CUDA Fortran, overlaying either peer-to-peer and message passing interface (MPI) approaches
- Includes complete resource code for all of the examples and a number of other case reports
- Download resource code and slides from the book's significant other website
Read Online or Download CUDA Fortran for Scientists and Engineers. Best Practices for Efficient CUDA Fortran Programming PDF
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Extra info for CUDA Fortran for Scientists and Engineers. Best Practices for Efficient CUDA Fortran Programming
5 Execution Configuration . . . . . . . . . . 1 Thread-Level Parallelism . . . . . . . . . 1 Shared Memory . . . . . . . . . 2 Instruction-Level Parallelism . . . . . . . . CUDA Fortran for Scientists and Engineers. 00003-1 © 2014 Elsevier Inc. All rights reserved. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 Instruction Optimization . . . 1 Device Intrinsics . . . . 1 Directed Rounding . 2 C Intrinsics . . . 3 Fast Math Intrinsics . 2 Compiler Options . . . . 3 Divergent Warps . . . . 7 Kernel Loop Directives .
107 108 108 108 108 108 109 110 113 113 114 In the previous chapter we discussed how we can use timing information to determine the limiting factor of kernel execution. Many science and engineering codes turn out to be bandwidth bound, which is why we devote the majority of this relatively long chapter to memory optimization. CUDA-enabled devices have many different memory types, and to program effectively, we need to use these memory types efficiently. Data transfers can be broken down in to two main categories: data transfers between host and device memories, and data transfers between different memories on the device.